Holifield, Phil (1995) A Slotted Ring Test Bed for the Study of ATM Network Congestion Management. Doctoral thesis, University of Central Lancashire.
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This thesis addresses issues raised by the proposed Broadband Integrated Services Digital Network which will provide a flexible combination of integrated services traffic through its cell-based Asynchronbus Transport Mode (ATM). The introduction of a cell-based, connection-oriented, transport mode brings with it new technical challenges for network management. The routing of cells, their service at switching centres, and problems of cell congestion not encountered in the existing network, are some of the key issues.
The thesis describes the development of a hardware slotted ring testbed for the investigation of congestion management in an ATM network. The testbed is designed to incorporate a modified form of the ORWELL protocol to control media access. The media access protocol is analysed to give a model for maximum throughput and reset interval under various traffic distributions. The results from the models are compared with measurements carried out on the testbed, where cell arrival statistics are also varied. It is shown that the maximum throughput of the testbed is dependent on both traffic distribution and cell arrival statistics.
The testbed is used for investigations in a heterogeneous traffic environment where two classes of traffic with different cell arrival statistics and quality of service requirements are defined. The effect of prioritisation, media access protocol, traffic intensity, and traffic source statistics were investigated by determining an Admissible Load Region (ALR) for a network station. Conclusions drawn from this work suggest that there are many problems associated with the reliable definition of an ALR because of the number of variable parameters which could shift the ALR boundary. A suggested direction for further work is to explore bandwidth reservation and the concept of equivalent capacity of a connection, and how this can be linked to source control parameters.
|Item Type:||Thesis (Doctoral)|
|Subjects:||Engineering > Electrical engineering|
|Schools:||Faculty of Science and Technology > School of Physical Sciences and Computing|
|Deposited By:||Hayley Gayle Moran|
|Deposited On:||17 Dec 2012 11:49|
|Last Modified:||10 Feb 2017 12:43|
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